The TQMC605 is a VITA 93.0 compatible single-width QMC offering a user programmable AMD Artix™ 7 7A50T FPGA, supported by the AMD Vivado™ software.
The TQMC605 offers 40 I/O lines that are directly connected to FPGA-pins, maintaining the flexibility of the SelectIO™ technology of the Artix 7 FPGA. All I/O lines provide external ESD-protection devices.
The User FPGA is configured by an SPI flash. An in-circuit debugging option is available via the QMC’s JTAG interface for read back and real-time debugging of the FPGA design (using the Vivado™ ILA).
TEWS offers a well-documented basic FPGA Example Application design. It includes a constraints file with all necessary pin assignments and basic timing constraints. The example design covers the main functionalities of the TQMC605. It implements PCIe to register mapping and basic I/O. It comes as an AMD Vivado Design Suite project with source code and as a ready-to-download bit stream.
User applications for the TQMC605 can be developed using the AMD design tools, which can be downloaded free of charge from www.amd.com.
TEWS Technologies is a partner at the highest level within the AMD Embedded Partner Program and offers FPGA Design and Integration services for all its FPGA solutions. The engineering team specializes in designing highly optimized FPGA designs and has extensive experience in minimizing FPGA gate usage. Having the FPGA custom designed according to the customer’s needs avoids overhead and delays leading to a reduction of costs for the customer.
Learn more about TEWS Technologies FPGA Development capabilities.
