TPCE863

4 Channel High Speed Synch/Asynch Serial Interface

  • Standard height, half-length PCI Express 1.1 compliant module
  • 4 high speed serial data communication channels
  • A wide range of I/O interfaces individually programmable for each channel
  • Several communication protocols
    • asynchronous (with oversampling)
    • isochronous
    • HDLC
  • 512 longword FIFO (512 x 32 bit) per channel
  • DMA support
  • Different signal encodings (NRZ, NRZI, FM0, FM1 and Manchester)
  • Multiple clock sources (for a wide bitrate spectrum)
  • Front panel I/O via HD68 SCSI-3 type connector

Product status: Active

The TPCE863 is a standard height, half-length PCI Express 1.1 compliant module with four high speed serial data communication channels.

The serial communication controller is implemented in FPGA logic, along with a bus master capable PCI interface, guaranteeing long term availability with the option to implement additional functions in the future. The FPGA is connected to the PCI Express interface via a transparent PCI Express to PCI bridge.

Each channel has a receive and a transmit FIFO of 512 long words (32 bit) per channel for high data throughput.

Data transfer on the PCI Express bus is handled via TPCE863 initiated DMA cycles with minimum host/CPU intervention.

Several serial communication protocols are supported by each channel, such as asynchronous, isochronous, synchronous and HDLC mode.

A 14.7456 MHz oscillator provides standard asynchronous baud rates. A 24 MHz and a 10 MHz oscillator are provided for other (synchronous) baud rates.

Additionally each channel provides various interrupt sources, generated on INTA. The interrupt sources can be enabled or disabled individually.

Multiprotocol transceivers are used for the line interface. The physical interface is selectable by software, individually for each channel as EIA-232, EIA-422, EIA449, EIA-530, EIA-530A, V.35, V.36 or X.21.

A HD68 SCSI-3 type connector at the front panel provides access to the I/O lines.

The following signals are provided by the TPCE863 for each channel at the front I/O connector:

Receive Data (RxD +/-), Transmit Data (TxD +/-), Receive Clock (RxC +/-), Transmit Clock (TxC +/-), Ready-To-Send (RTS +/-), Clear-To-Send (CTS +/-), Carrier-Detect (CD +/-) and GND. Additionally, serial channel 3 provides Data-Set-Ready (DSR3 +/-) and Data-Terminal-Ready (DTR3 +/-).

A serial EEPROM is used to store detailed board information and special configuration parameters

Mechanical Interface PCISIG conforming PCI Express Revision 1.1; Standard Height, Half Length
Electrical Interface PCISIG conforming PCI Express Revision 1.1; Single Link Width (x1)
PCI Express / PCI Bridge PI7C9X111SL (Pericom Semiconductor Corporation)
Serial Communication Controller (FPGA) XC3S1500-4FG(G)320I; Spartan-3 FPGA (Xilinx)
Number of Channels 4
Line Transceiver LTC2844/LTC2846 (Linear Technology) Multi-Protocol chip set, software selectable, on-chip cable termination (LTC2846)
FIFOs Main Transmit-FIFO per channel: up to 512 DWORD (2 Kbyte)
Main Receive-FIFO per channel: 512 DWORD (2 Kbyte)
SCC Transmit-FIFO per channel: up to 16 Byte
SCC Receive-FIFO per channel: 16 Byte
Data Rates Synchronous: 10 Mbit/s (Non-DPLL Modes), 2 Mbit/s (DPLL Modes)
Asynchronous: 2 Mbit/s
I/O Connector Front panel HD68 SCSI-3 Type Connector (AMP 787082-7 or compatible)
Power Requirements 51mA typical (no cable mode) @ +3.3V DC
81mA typical (V.28) @ +3.3V DC
1.15A typical (RS530/A) @ +3.3V DC
Temperature Range Operating: -40 °C to +85 °C
Storage: -40 °C to +85 °C
Humidity 5-95 % non-condensing
MTBF 280 988 h
Weight 86 g

PRODUCT VARIATIONS

TPCE863-10R

4 Channel High Speed Synch/Asynch Serial Interface

4 programmable EIA-232/EIA-422/EIA-449/EIA-530/EIA-530A/V.35/V.36/X.21 interfaces with hardware handshake and modem support (1 channel); DMA support; data rates up to 10 Mbit/s; Front I/O via HD68 / SCSI-3 connector

ACCESSORIES

HD68 / SCSI-3 Cable

HD68 / SCSI-3 Terminal Block

Cable Kit for Modules with HD68 / SCSI-3 Connector

SOFTWARE

Device Driver for Synch/Asynch Serial Interface Family

Data Sheet

Data Sheet - Issue 1.0.1

User Manual

User Manual - Issue 1.0.1