TFMC684

32 Differential I/O FPGA Mezzanine Card

  • FMC Module complying with the ANSI/VITA 57.1
  • 32 bit M-LVDS I/O Interface
  • 32 bit RS-485/RS-422 I/O Interface
  • 32 independent control signals at Low Pin Count FMC Connector
  • Converts 32 single-ended data lines into 32 differential pairs
  • supports signaling rates up to 200 Mbit/s
  • VHDCI-68 Connector in front panel

Product status: Active

The TFMC684 is an FMC (FPGA Mezzanine Card) Mezzanine Module complying with the ANSI/VITA 57.1 standard that offers the possibility to add a 32bit M-LVDS (Multipoint Low Voltage Differential Signaling) I/O Interface or a 32bit RS-485/RS-422 I/O Interface to FMC Carrier Cards.

The Low Pin Count FMC Connector provides 32 independent control signals which configure the direction of each Differential Transceiver.

The 32 data lines are routed as single-ended traces from the FMC Connector to the Differential Transceivers where they are converted into 32 differential pairs.

The TFMC684-10R meets the TIA/EIA-899 standard (Type-2 Receivers) and the TFMC684-20R meets the TIA/EIA-485 and the TIA/EIA-422 standard.

The 32 bits of differential I/O are connected to a VHDCI-68 Connector in the front panel.

On every of the 32 bits the TFMC684-10R supports signaling rates up to 200Mbit/s which means that a 100MHz clock can be transmitted or in other words that 200M of voltage transitions per second can be performed. The TFMC684-20R supports signalling rates up to 16Mbit/s.

All signals connecting the Differential Driver/Receivers with the FMC Carrier are powered by an adjustable voltage generated by the Carrier. Because of voltage translation devices on the TFMC684 this voltage can range from 1.2V to 3.6V which allows the FPGA's I/O cells to be configured for various different I/O standards.

The signaling standard reference voltage pin, which is powered by the TFMC684, provides half of the adjustable voltage generated by the carrier for I/O standards requiring a reference voltage.

A power good LED indicates whether all voltages on the TFMC684, which are provided by the FMC Carrier, are within limits.

The TFMC684 is equipped with an I2C EEPROM which acts as an IPMI resource requesting the value of the adjustable voltage, for example.

The module meets the requirements to operate in extended temperature range from -40° to +85°C.

Mechanical Interface FPGA Mezzanine Card (FMC) Mezzanine Module conforming to ANSI/VITA 57.1; Single Width, 10mm stacking height; Air cooled Commercial Grade with Front Panel; Regions 1 and 2 populated
Electrical Interface Low-Pin Count Connector; 64 User defined signals on Bank A
1.2V to 3.6V Signaling Voltage (VADJ); Nominal Voltage: 1.8V (Preferred VADJ Signaling Voltage)
M-LVDS Driver and Receiver SN65MLVD206 (Texas Instruments) or compatible
RS-485/RS-422 Transceiver MAX3078E (Maxim Integrated) or compatible
EEPROM M24C02 (STMicroelectronics) or compatible
Number of Channels 32 differential channels
Maximum Speed 200Mbit/s on each channel (M-LVDS)
16Mbit/s on each channel (RS-485/RS-422)
I/O Connector Front I/O VHDCI68 / SCSI-V (Honda HDRA-EC68LFDT-SL+ or compatible)
Power Requirements DC Load: max. 300mA @VADJ / max. 800mA @ +3.3V (TFMC684-10R) , max. 2000mA@+3.3V (TFMC684-20R)
DC Output: max 1mA @ VREF_A_M2C
Temperature Range Operating: -40°C to +85°C
Storage: -40°C to +85°C
MTBF 1) 684000 h to 873000 h
Weight 43 g
Humidity 5 – 95% non-condensing

1) depends on variant, for further details see User Manual

PRODUCT VARIATIONS

TFMC684-10R

32 M-LVDS I/O, LPC-FMC

FMC for 32 M-LVDS I/O, VHDCI-68 Front Panel Connector

TFMC684-20R

32 RS485/RS422 I/O, LPC-FMC

FMC for 32 RS485/RS422 I/O, VHDCI-68 Front Panel Connector

Data Sheet

Data Sheet - Issue 1.0.2

User Manual

User Manual - Issue 1.0.2