TMPE627

Reconfigurable FPGA with AD/DA & Digital I/O PCIe Mini Card

  • Standard PCI Express Mini Card
  • User programmable FPGA (Xilinx Artix-7)
  • 14 TTL lines
    • 5 V-tolerant
    • ESD-protected I/O lines
    • Each I/O line is individually configurable (e.g. direction)
    • 3 output state (high, low, and tristate)
    • 3 pull voltages (GND, 3.3 V, and 5 V)
  • 4 channels 16 bit ADC
    • Offering single-ended and differential mode
    • 7 individually selectable voltage input ranges (up to ±10.24 V)
    • Sampling rate up to 200 ksps
  • 4 channels 16 bit DAC
    • 4 individually selectable voltage output ranges (up to ±10.8 V)
    • 10 μs conversion time
  • Factory calibration data for ADC and DAC is available
  • Provides a basic heatsink to facilitate thermal management

Product status: Active

The TMPE627 is a standard full PCI Express Mini Card, providing a user programmable Xilinx Artix-7 7A50T FPGA.

The TMPE627 provides 14 ESD-protected 5 V-tolerant TTL lines. All I/O lines are individually programmable as input or output. TTL I/O lines can be set to high, low, or tristate. Each TTL I/O line has a pull-resistor to a common programmable pull-up voltage that can be set so +3.3 V, +5 V and GND.

The 16 bit ADC offers 4 input channels that can be operated in single-ended or differential mode. It offers software selectable input voltage ranges of 0-5.12 V, 0-10 V, 0-10.24 V, ±5 V, ±5.12 V, ±10 V and ±10.24 V with a sampling rate of up to 200 ksps.

The DAC offers 4 channels of 16 bit analog outputs with software selectable output voltage ranges of 0-5 V, 0-10 V, 0-10.8 V, ±5 V, ±10 V or ±10.8 V. The output voltage range can be individually set per channel. The conversion time is typ. 10 μs and the DAC outputs are capable to drive a load of 2 k©, with a capacitance up to 4000 pF.

Each TMPE627 is factory calibrated. The calibration information is stored in an on-board serial EEPROM unique to each TMPE627 module.

The I/O signals are accessible through a 30 pin Pico-Clasp latching connector.

The User FPGA is configured by a SPI flash. An in-circuit debugging option is available via a JTAG header for read back and real-time debugging of the FPGA design (using the Vivado ILA). With the TA308 Programming Kit direct JTAG access to the FPGA is possible, using the Xilinx Platform Cable USB.

User applications for the TMPE627 with 7A50T FPGA can be developed using the design software Vivado Design Suite HL WebPACK Edition, which can be downloaded free of charge from www.xilinx.com.

TEWS offers a well-documented basic FPGA Example Application design. It includes a constraints file with all necessary pin assignments and basic timing constraints.

The example design covers the main functionalities of the TMPE627. It implements PCIe to register mapping and basic I/O. It comes as a Xilinx Vivado Design Suite project with source code and as a ready-to-download bit stream.

The TMPE627 provides a basic heatsink to facilitate thermal management. The heatsink can be used to install additional cooling solutions like passive or active heatsinks or to provide a thermal connection to an enclosure.

Mechanical Interface PCI Express Mini Card conforming to PCI Express Mini Card Electromechanical Specification, Revision 2.0
Card Type: Full-Mini Card (50.95 x 30 mm)
Electrical Interface PCI Express x1 Link conforming to PCI Express Base Specification, Revision 2.0
The TMPE627 does not support the USB interface
User configurable FPGA TMPE627-10R: XC7A50T-2 (Xilinx)
SPI-Flash N25Q128A (Micron) 128 Mbit (contains TMPE627 FPGA Example) or compatible
ADC LTC2348 (Linear Technologies)
DAC AD5754R (Analog Devices)
Digital I/O Channels 14 ESD-protected 5 V-tolerant TTL lines
Digital I/O Transceiver 74LVC2G241 (or compatible)
Analog Inputs 4x 16-bit, 200 ksps, simultaneous sampling differential/single-ended ADC
Analog Input Voltage Software selectable:     0-5.12 V, 0-10 V, 0-10.24 V / ±5 V, ±5.12 V, ±10 V, ±10.24 V
Analog Output Channels 4x 16-bit, 10 µs settling, single-ended DAC
Analog Output Voltage Software selectable:   0-5 V, 0-10 V, 0-10.8V, ±5 V, ±10 V, ±10.8 V
I/O Connectors 30 pol. Pico-Clasp latching connector
Power Requirements Depends on FPGA design
With TMPE627 FPGA Example Design running, DACs driving the ADCs and into a 2 kohm load:
+3.3Vaux:    650 mA typical
+1.5V:           200 mA typical
Temperature Range Storage: -40°C to +85°C
MTBF 987000 h
Humidity 5 – 95% non-condensing
Weight 13 g

PRODUCT VARIATIONS

TMPE627-10R

Reconfigurable FPGA with 4 Analog Input , 4 Analog Output and 14 TTL I/O

Artix-7 FPGA (XC7A50T); 4 analog inputs; 16 bit; programmable ranges up to +/-10.24 V; 4 analog outputs; 16 bit; programmable ranges up to +/-10.8 V; 14 TTL I/O; I/O via 30 pos. Pico-Clasp connector

ACCESSORIES

Pico-Clasp Cable Harness, 500mm

Pico-Clasp Terminal Block

Cable Kit for Modules with XRS Debug Connector

Cable Kit for Modules with Pico-Clasp Connector

SOFTWARE

Device Driver for Board Family with Reconfigurable FPGA

Data Sheet

Data Sheet - Issue 1.0.5

User Manual

User Manual - Issue 1.0.6

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