FPGA DEVELOPMENT

FPGA Design and Integration Services

TEWS Technologies offers FPGA Design and Integration services for all the user programmable standard FPGA modules for XMC, PMC, CompactPCI, and mPCIe. This is especially helpful if the customer development group does not have the resources or capabilities to perform the FPGA development in a timely manner.  

Our team of world class firmware experts develop all code for the TEWS’ FPGA products in house. The designs cover the entire spectrum of simple controller designs to highly integrated FPGA’s such as the AMD Zynq® UltraScale+™.

The engineering team specializes in designing highly optimized FPGA designs and has extensive experience in minimizing FPGA gate usage. Working with standard cores often leads to unnecessarily high space requirements and slower designs. Having the FPGA custom-designed according to the customer’s needs avoids overhead and delays, resulting in reduced costs for the customer.

The standard blank FPGA boards offer multiple I/O choices for digital, analog, and communications physical interfaces. These TEWS’ products are the hardware base used to implement custom FPGA designs.

Premier Level AMD Adaptive Computing Partner

Since 2017, TEWS Technologies has been a member of the AMD Adaptive Computing Partner Program. As part of this partnership, our FPGA experts undergo annual certifications to ensure that our FPGA designs remain on the leading edge of the latest technology. In 2025, AMD invited TEWS Technologies to join the highest tier of the AMD Adaptive Computing Partner Program, the Premier level.

AMD Adaptive Computing Partner Programm - Premier Level

Our Portfolio of User Programmable FPGA Modules

TXMC637_image

TXMC637

Reconfigurable FPGA with 16x Analog Input 8x Analog Output and 32x Digital I/O

  • Standard XMC Module
  • User configurable FPGA (AMD Artix™ 7)
  • DDR3 SDRAM bank, 256M x 16 bit (512 MB)
  • 32 channels 16 bit ADC
    • Offering single-ended and differential mode
    • Programmable input voltage
    • Conversion time: up to 1.1 µs
    • Sampling rate up to 1 Msps
  • 8 channels single-ended analog output
    • 16 bit resolution
    • Programmable output voltage: ±10 V, ±5.0 V or ±2.5 V
    • Full scale settling time: typ.1 µs
  • 32 digital TTL compatible I/O lines
    • 16 lines optional configurable as differential RS422 interface
  • P14/P16 Rear I/O lines
    • 64 single ended or 32 differential rear I/O lines on a rear XMC 64 pin P14 connector
    • 4 FPGA Multi-Gigabit-Transceiver on a rear XMC P16 connector
VIEW FULL SPECIFICATIONS
TXMC638 I User Programmable FPGA XMC Module with Analog Input

TXMC638

Reconfigurable FPGA with Analog Input

  • Standard XMC module
  • User configurable FPGA (AMD Kintex™ 7)
  • 1 Gbyte, 32 bit wide DDR3 SDRAM
  • 24 channels 16 bit ADC
    • Offering single-ended and differential mode
    • single-ended voltage input ranges (±2.5 V)
    • differential voltage input ranges (±5 V)
    • Sampling rate up to 5 Msps
  • Digital rear I/O
    • 64 single ended digital I/O lines (LVCMOS25) or 32 differential digital I/O lines (LVDS25)
  • Front panel I/O (Rugged EdgeRate connector) and rear I/O via P14 and P16
VIEW FULL SPECIFICATIONS
TXMC639 Reconfigurable FPGA with 16x Analog Input 8x Analog Output and 32x Digital I/O

TXMC639

Reconfigurable FPGA with 16x Analog Input 8x Analog Output and 32x Digital I/O

  • Standard XMC Module
  • User configurable FPGA (AMD  Kintex™ 7)
  • DDR3 SDRAM bank, 256M x 32 bit (1 GB)
  • Up to 16 channels differential analog input
    • 16 bit resolution
    • Programmable input voltage
    • Sampling rate up to 1.5 Msps
  • Up to 8 channels single-ended analog output
    • 16 bit resolution
    • Programmable output voltage: ±10 V, ±5.0 V or ±2.5 V
    • Full scale settling time: typ.1 µs
  • 32 digital TTL compatible I/O lines
    • 16 lines optional configurable as differential RS422 interface
  • P14/P16 Rear I/O lines
    • 64 single ended or 32 differential rear I/O lines on a rear XMC 64 pin P14 connector
    • 4 FPGA Multi-Gigabit-Transceiver on a rear XMC P16 connector
VIEW FULL SPECIFICATIONS
TXMC633 I User Programmable XMC FPGA Module with TTL and Differential I/O

TXMC633

Reconfigurable FPGA with TTL and Differential I/O

  • Standard XMC module
  • User configurable FPGA (AMD Spartan ™ 6)
  • 128 Mbyte, 16 bit wide DDR3 SDRAM
  • 64 TTL I/O line or 32 differential I/O lines (EIA-422 / EIA485 compatible) or 32 differential I/O lines (M-LVDS) or 32 TTL I/O line and 16 differential I/O lines
  • I/O direction is individually programmable
  • On board termination resistors for differential I/O
  • Front panel I/O (HD68 SCSI-3 type connector) and rear I/O via P14 and P16
VIEW FULL SPECIFICATIONS
TXMC635 I User Programmable FPGA XMC Module with Analog Input (16 bit), Analog Output (16 bit) and TTL I/O

TXMC635

Reconfigurable FPGA with Analog Input (16 bit), Analog Output (16 bit) and TTL I/O

  • Standard XMC module
  • User configurable FPGA (AMD Spartan ™ 6)
  • 128 Mbyte, 16 bit wide DDR3 SDRAM
  • 48 TTL I/O line
    • I/O direction is individually programmable
    • ESD protected
  • 32 channels 16 bit ADC
    • Offering single-ended and differential mode
    • 7 individually selectable voltage input ranges (up to ±24.576 V)
    • Sampling rate up to 1 Msps
  • 8 channels 16 bit DAC
    • 3 selectable voltage output ranges (up to ±10.5263 V)
    • 10 μs conversion time
  • Front panel I/O (VHD100 – 0.8 mm pitch connector) and rear I/O via P14 and P16
VIEW FULL SPECIFICATIONS
TPMC634 I User Programmable FPGA with 64 TTL I/O / 32 Diff. I/O PMC Module

TPMC634

Re-Configurable FPGA with 64 TTL I/O / 32 Diff. I/O

  • Standard single-width PMC module
  • User configurable FPGA (Xilinx Spartan-6)
  • 64 TTL I/O lines or 32 differential I/O lines (EIA-422 / EIA485 compatible) or 32 differential I/O lines (M-LVDS) or 32 TTL I/O line and 16 differential I/O lines
  • I/O direction is individually programmable
  • Configurable pull voltage for TTL I/O
  • On board termination resistors for differential I/O
  • Auto-configurable User FPGA
  • User FPGA and SPI flash are in-system programmable via PCI bus
  • User FPGA JTAG port via on-board header
VIEW FULL SPECIFICATIONS
TMPE623 I Reconfigurable FPGA with Digital I/O PCIe Mini Card

TMPE623

Reconfigurable FPGA with Digital I/O PCIe Mini Card

  • Standard PCI Express Mini Card
  • User programmable FPGA (AMD Artix™ 7)
  • 26 TTL lines (5 V-tolerant) or 13 differential I/O lines (EIA-422 / EIA-485 compatible) or 13 differential Multipoint-LVDS lines
  • ESD-protected I/O lines
  • Each I/O line is individually configurable (e.g. direction)
  • 3 state TTL output (high, low, and tristate)
  • 3 TTL pull voltages (GND, 3.3 V, and 5 V)
  • Onboard termination for differential I/O lines
  • Provides a basic heatsink to facilitate thermal management
VIEW FULL SPECIFICATIONS
TMPE627 I Reconfigurable FPGA with AD/DA & Digital I/O PCIe Mini Card

TMPE627

Reconfigurable FPGA with AD/DA & Digital I/O PCIe Mini Card

  • Standard PCI Express Mini Card
  • User programmable FPGA (AMD Artix ™ 7)
  • 14 TTL lines
    • 5 V-tolerant
    • ESD-protected I/O lines
    • Each I/O line is individually configurable (e.g. direction)
    • 3 output state (high, low, and tristate)
    • 3 pull voltages (GND, 3.3 V, and 5 V)
  • 4 channels 16 bit ADC
    • Offering single-ended and differential mode
    • 7 individually selectable voltage input ranges (up to ±10.24 V)
    • Sampling rate up to 200 ksps
  • 4 channels 16 bit DAC
    • 4 individually selectable voltage output ranges (up to ±10.8 V)
    • 10 μs conversion time
  • Factory calibration data for ADC and DAC is available
  • Provides a basic heatsink to facilitate thermal management
VIEW FULL SPECIFICATIONS
TMPE633 I Reconfigurable FPGA with Digital I/O PCIe Mini Card

TMPE633

Reconfigurable FPGA with Digital I/O PCIe Mini Card

  • Standard PCI Express Mini Card
  • User programmable FPGA (AMD Spartan ™ 6)
  • 26 TTL lines (5 V-tolerant) or 13 differential I/O lines (EIA-422 / EIA-485 compatible) or 13 differential Multipoint-LVDS lines
  • ESD-protected I/O lines
  • Each I/O line is individually configurable (e.g. direction)
  • 3 state TTL output (high, low, and tristate)
  • 3 TTL pull voltages (GND, 3.3 V, and 5 V)
  • Onboard termination for differential I/O lines
VIEW FULL SPECIFICATIONS

TPCE636

Reconfigurable FPGA with 16x Analog Input and 16x Analog Output

  • Standard height, half-length PCI Express 2.1 compliant module
  • Supports PCI Express x4 link
  • User configurable FPGA (AMD Kintex™ 7)
  • 1 Gbyte, 32 bit wide DDR3 SDRAM
  • 64 FPGA I/O lines on back I/O connector
    • 64 single ended LVCMOS25 or 32 differential LVDS25 interface.
  • 16 channels 16 bit ADC
    • Differential interface
    • Input range ±20 V
    • Sampling rate up to 5 Msps
  • 16 channels 16 bit DAC
    • Output range ±10 V
  • Front panel I/O via Samtec ERF8-049 Rugged EdgeRate connector
VIEW FULL SPECIFICATIONS